The present invention generally relates to relaxation oscillators, and, more particularly, to a relaxation oscillator with reduced area and power consumption.
Relaxation oscillators are widely used in modern electronic systems including radio, telecommunications, and computers for generating oscillator signals. The oscillator signals are required to meet timing critical requirements such as modulation and demodulation of message signals and synchronous operation of electronic circuits. A conventional relaxation oscillator includes a resistor-capacitor (RC) circuit (connected to a power supply), first and second comparators, and a logic circuit. The RC circuit includes a resistor and first and second capacitors. The first and second capacitors are connected to the first and second comparators to provide first and second capacitor voltages to negative terminals of the first and second comparators, respectively. The first and second comparators also receive a threshold voltage generated by a resistor divider circuit or receive a bandgap voltage generated by a voltage source. The first and second capacitors are alternately charged by the power supply by way of the resistor. When a first capacitor voltage reaches the threshold voltage, the corresponding comparator that receives the first capacitor voltage trips and causes a transition in an output signal generated by the comparator. Thereafter, the first capacitor discharges to ground and the second capacitor is charged. After, a second capacitor voltage reaches the threshold voltage, the corresponding comparator that receives the second capacitor voltage trips and causes a transition in an output signal generated by the comparator. The second capacitor discharges to ground and the first capacitor is charged and the process repeats continuously. The logic circuit is connected to the outputs of the first and second comparators and generates an oscillator signal based on transitions in output signals generated by the first and second comparators.
The first and second comparators require a current source to operate which considerably occupies silicon area and increases the area and power consumed by a system-on-a-chip (SoC) on which the relaxation oscillator is integrated. Additionally, propagation delays of the first and second comparators vary substantially across various process corners and lead to variations in the frequency of the oscillator signal which deteriorates the fidelity of the oscillator signal.
Therefore, it would be advantageous to have a relaxation oscillator that has a low frequency spread across low supply voltage and process corners, that operates without a current source and consumes less power, and that overcomes the above-mentioned limitations of existing relaxation oscillators.